![]() |
|||||||
|
|||||||
![]() |
STP60NF06 资料 | |
![]() |
STP60NF06 PDF Download |
File Size : 105 KB
Manufacturer:ST Description:The PWR_DWN# signal is an asynchronous, active-low LVTTL input that places the device in a low power inac- tive state without removing power from the device. All internal clocks are turned off, and all clock outputs are held low. Since PWR_DWN# is asynchronous, the signal is syn- chronized internally to each individual clock. As shown in Figure 3, a falling-rising-falling edge sequence on any individual clock output is required before that clock output is disabled low. This edge sequence ensures that one complete clock cycle will occur before the clock stops. |
相关型号 | |
◆ LM4810MM | |
◆ DF40C-40DP-0.4V(51) | |
◆ DF40C(2.0)-40DS-0.4V(51) | |
◆ ANA6502 | |
◆ ANA6501 | |
◆ ANA6180 | |
◆ ANA6518 | |
◆ SN65HVD1050DR | |
◆ SP3072EEN-L/TR | |
◆ SKY85709-11 |
1PCS | 100PCS | 1K | 10K | ||
价 格 | |||||
型 号:STP60NF06 厂 家:ST 封 装:TO-220 批 号:17+ 数 量:28000 说 明:28000 |
|||||
运 费: 所在地: 新旧程度:全新原装 |
|||||
联系人:朱先生,唐小姐 |
电 话:0755-82545498 |
手 机:13538016218 |
QQ:531398920 |
MSN: |
传 真:0755-84709776 |
EMail:531398920@qq.com |
公司地址: 深圳市福田区赛格科技园4栋西8A01 |